PIC16F785-I/SS【PDF 42/206 页】IC PIC MCU FLASH 2KX14 20SSOP

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136

8272E–AVR–04/2013

ATmega164A/PA/324A/PA/644A/PA/1284/P

When the ICRn is used as TOP value (see description of the WGMn3:0 bits located in the

TCCRnA and the TCCRnB Register), the ICPn is disconnected and consequently the Input Cap-

ture function is disabled.

Bit 5 – Reserved

This bit is reserved for future use. For ensuring compatibility with future devices, this bit must be

written to zero when TCCRnB is written.

Bit 4:3 – WGMn3:2: Waveform Generation Mode

See “TCCRnA – Timer/Counter n Control Register A description on page 133.

Bit 2:0 – CSn2:0: Clock Select

The three Clock Select bits select the clock source to be used by the Timer/Counter, see Figure

16-10 and Figure 16-11.

If external pin modes are used for the Timer/Countern, transitions on the Tn pin will clock the

counter even if the pin is configured as an output. This feature allows software control of the

counting.

16.12.3

TCCRnC – Timer/Counter n Control Register C

Bit 7 – FOCnA: Force Output Compare for Channel A

Bit 6 – FOCnB: Force Output Compare for Channel B

The FOCnA/FOCnB bits are only active when the WGMn3:0 bits specifies a non-PWM mode.

However, for ensuring compatibility with future devices, these bits must be set to zero when

TCCRnA is written when operating in a PWM mode. When writing a logical one to the

FOCnA/FOCnB bit, an immediate compare match is forced on the Waveform Generation unit.

The OCnA/OCnB output is changed according to its COMnx1:0 bits setting. Note that the

FOCnA/FOCnB bits are implemented as strobes. Therefore it is the value present in the

COMnx1:0 bits that determine the effect of the forced compare.

Table 16-6.

Clock Select bit description.

CSn2

CSn1

CSn0

Description

No clock source (Timer/Counter stopped).

001

clkI/O/1 (No prescaling)

010

clk

I/O/8 (From prescaler)

011

clkI/O/64 (From prescaler)

100

clkI/O/256 (From prescaler)

101

clk

I/O/1024 (From prescaler)

External clock source on Tn pin. Clock on falling edge.

External clock source on Tn pin. Clock on rising edge.

Bit

765

(0x82)

FOCnA

FOCnB

–

TCCRnC

Read/Write

R/W

Initial Value000

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